Memory Subsystem Enablement Verification Engineer

AMD AMD · Semiconductors · OTTAWA, ON · Engineering

Seeking a pre-silicon Verification Engineer for AMD's Memory Subsystem team to ensure readiness of high-speed memory IPs using advanced co-simulation environments. The role involves end-to-end verification from definition through production, focusing on developing and implementing advanced testbench architectures and test suites.

What you'd actually do

  1. Excellent knowledge of C, C++, System Verilog
  2. Experience in ground-up development and verification with IP and Subsystem verification
  3. Advanced testbench architecture, microarchitecture, development, and implementation experience, including co-verification
  4. In depth knowledge of code and functional coverage constructs as well as test plans to coverage relationships
  5. Development and debug of co-verification environment with production level firmware

Skills

Required

  • C
  • C++
  • System Verilog
  • IP and Subsystem verification
  • Testbench architecture
  • Microarchitecture
  • Co-verification
  • Code and functional coverage
  • Test plans
  • Firmware development and debug

Nice to have

  • Monitors and checkers
  • SVA/OVL
  • Synthesizable assertions
  • DDR/JEDEC standard IP
  • DDR PHY
  • Memory Controller verification
  • UVM object-oriented design
  • Architectural models
  • System C
  • Python
  • Zebu Emulation verification
  • Hardware/Firmware co-verification
  • UVM System Verilog
  • C-DPI
  • Gasket structured testbench
  • Memory VIP integration
  • Initialization and debug
  • End to end verification
  • Lab bring up
  • Synchronization techniques
  • Hardware level clocking
  • Multi-domain simulation synchronization
  • GIT
  • Perforce
  • Regressions
  • Coverage databases
  • SoC IP knowledge
  • Architectural understanding