Mla Design Verification Engineer, Annapurna Labs

Amazon Amazon · Big Tech · Austin, TX · Applied Science

This role is for a Design Verification Engineer focused on machine learning hardware within Amazon Web Services. The engineer will be responsible for the design and validation of ML hardware in data centers, developing and executing verification plans, and ensuring hardware and software solutions meet desired functionality and customer metrics. The role requires experience in design verification using System Verilog and UVM.

What you'd actually do

  1. verifying/validating that our hardware and software solutions achieve their desired functionality
  2. developing and executing multi-faceted verification/validation plans
  3. measuring the teams progress towards our ambitious customer metrics

Skills

Required

  • Bachelor's degree in Electrical Engineering or a related field
  • 3+ years of design verification experience using System Verilog and UVM
  • 3+ years of experience in testbench development including stimulus, checkers, assertions and coverage

Nice to have

  • Experience using multiple verification platforms
  • Experience with C/C++ and Object-Oriented Programming
  • Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing