Pcb Design Layout Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior PCB Design Layout Engineer to join their Hardware Layout team. The role involves performing PCB layout for various NVIDIA business units, including high-speed/high-density PCBs, managing component placement, constraints, and ensuring signal/power integrity. Responsibilities include design releases, generating artwork files, and adhering to regulations and specifications.

What you'd actually do

  1. Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (Information Network, GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI).
  2. Complete development of CAD layout from detailed component placement, constraints management, with a concept of topology and signal and power integrity.
  3. Be responsible for the design releases required generation of artwork files, ODB++, test reports, and electronic PCB documentation.
  4. Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specification.

Skills

Required

  • B.Sc. in Electrical Engineering or related field (or equivalent experience)
  • 6+ years of overall relevant practical experience
  • Proven leadership experience, with a track record of successfully managing teams and projects.
  • Excellent communication and interpersonal skills, with the ability to collaborate effectively across teams.
  • Detail-oriented approach with a focus on quality and reliability in PCB layout design.
  • Ability to thrive in a fast-paced, dynamic environment and adapt to changing priorities.
  • Strong problem-solving skills and the ability to troubleshoot complex design issues.

Nice to have

  • Proficiency in PCB design tools such as Cadence Allegro, or Mentor Graphics
  • Familiarity with industry standards and regulations related to PCB layout and manufacturing processes.
  • Strong understanding of high-speed digital design principles and signal integrity considerations.
  • advanced degree preferred