Perc Esd Eda Engineer

Intel Intel · Semiconductors · Oregon, Hillsboro, United States +3

Develops PERC ESD rule decks for latest Intel technologies, enabling design teams to get to market faster. Collaborates with internal and external teams, defines QA requirements, and leads innovation initiatives for ESD/LU verification automation.

What you'd actually do

  1. Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
  2. Create and maintain reliability ESD and LU design rule methodologies and specifications.
  3. Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
  4. Build and execute test cases for rule debugging, validation, and signoff.
  5. Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.

Skills

Required

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or other relevant STEM degree.
  • 1+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains).
  • 1+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools).
  • 1+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation.

Nice to have

  • Creative, independent, and "out of the box" thinker with strong analytical and problem-solving abilities.
  • Strong knowledge of ESD/LU PreSi models (HBM, CDM), I/O design, and related methodologies.
  • Strong attention to detail and excellent organization skills.
  • Ability to connect the dots across domains and propose cross disciplinary optimal solutions.
  • Self-drive with strong leadership skills; able to influence and align internal and external stakeholders.
  • Excellent written and verbal communication skills; able to present complex technical concepts clearly and concisely.
  • Proven success working with cross functional and cross site teams, with the ability to influence multiple internal and external partners.
  • Demonstrated ability to work in a fast paced, team-oriented environment and drive issues to closure.
  • Proven ability to work effectively in a dynamic, team-oriented environment.
  • Experience driving cross functional and industrywide initiatives or task forces.

What the JD emphasized

  • ESD PERC rule decks/runset development and debugging
  • ESD/LU rule decks
  • ESD/LU design rule methodologies
  • ESD/LU verification automation