Phy Technology Enablement Engineer

at Intel · Industrial · Haifa, Israel

This role focuses on enabling next-generation high-speed I/O technologies by leading PHY and SerDes IP validation and integration for future platforms. Responsibilities include pre-silicon validation of PHY IPs for standards like PCIe Gen7 and Ethernet 1.6T, evaluating internal and third-party IPs, defining IP requirements, developing integration guidelines, and debugging test chips. Requires a Bachelor's degree in Electrical Engineering with 3+ years of experience in electrical validation and debugging, and a solid understanding of SerDes architectures.

What you'd actually do

  1. Lead pre‑silicon validation of high‑speed I/O PHY IPs for next‑generation standards (PCIe Gen7, Ethernet 1.6T, DDR6)
  2. Evaluate internal and third‑party PHY IPs against product, system, and roadmap requirements
  3. Define IP requirements, drive vendor engagement, and influence IP selection decisions
  4. Develop and review PHY integration and architectural guidelines
  5. Lead debug and validation of high‑speed I/O test chips, resolving complex signal integrity and implementation issues

Skills

Required

  • Bachelor's degree in Electrical Engineering
  • 3+ years of relevant experience
  • pre-silicon validation
  • post-silicon electrical validation
  • debugging
  • SerDes architectures
  • high-speed I/O design principles
  • troubleshoot complex hardware issues
  • communication skills
  • collaboration skills

Nice to have

  • Experience with IEEE, PCIe SIG, or LPDDR standards activities
  • Familiarity with emerging interconnect standards (CXL, UALink, PCIe Gen7)
  • Background in post-FEC analysis
  • advanced signal integrity
Read full job description

Job Details:

Job Description:

Enable next‑generation high‑speed I/O technologies by leading PHY and SerDes IP validation and integration for future platforms. This role blends deep technical expertise with cross‑functional collaboration and industry standards engagement.

What You’ll Do

  • Lead pre‑silicon validation of high‑speed I/O PHY IPs for next‑generation standards (PCIe Gen7, Ethernet 1.6T, DDR6)
  • Evaluate internal and third‑party PHY IPs against product, system, and roadmap requirements
  • Define IP requirements, drive vendor engagement, and influence IP selection decisions
  • Develop and review PHY integration and architectural guidelines
  • Lead debug and validation of high‑speed I/O test chips, resolving complex signal integrity and implementation issues

Qualifications:

  • Bachelor’s degree in Electrical Engineering with 3+ years of relevant experience
  • Strong hands‑on experience in pre‑silicon and post‑silicon electrical validation and debugging
  • Solid understanding of SerDes architectures and high‑speed I/O design principles
  • Proven ability to troubleshoot complex hardware issues
  • Strong communication and collaboration skills

Nice to Have

  • Experience with IEEE, PCIe SIG, or LPDDR standards activities
  • Familiarity with emerging interconnect standards (CXL, UALink, PCIe Gen7)
  • Background in post‑FEC analysis and advanced signal integrity

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Haifa

Additional Locations:

Business group:

At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.