NVIDIA is looking for outstanding STA (Static Timing Analysis) Physical Design Engineers to join our remarkable Networking team in Israel. Our team focuses on building the industry's top high-speed communication devices, providing the highest efficiency and minimal latency. As part of NVIDIA, you'll be working in a meaningful, growing, and highly professional environment where your contributions make a significant impact. If you are ambitious, innovative, and ready to compete on the cutting edge of technology, this is the perfect opportunity for you!
What you'll be doing:
- Perform advanced Static Timing Analysis (STA) at a chiplet and FC level.
- Running Prime Time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
- Identify convergence risks and work closely with physical design, RTL and DFT teams, ensuring convergence throughout various project stages.
- Responsible for a full timing closer and quality approval from pre-layout STA model through signoff.
What we need to see:
- B.Sc. in Electrical Engineering or Computer Engineering.
- 2-3 years of experience as an STA engineer.
- Strong ability to quickly adapt to new technology and delve deeply into new areas.
- Excellent communication skills and a proven ability to work effectively in a team environment.
- Demonstrated drive to develop and implement new solutions.
Ways to Stand Out From the Crowd:
- Knowledge in physical build flows and methodologies (PNR, STA, physical verification).
- Familiarity with Prime Time tool
NVIDIA has some of the most forward-thinking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best physical design team in the industry!