Physical Design (backend) Technical Leader

Intel Intel · Semiconductors · Petah-Tikva, Israel

Senior Physical Design Technical Lead at Intel, responsible for leading and driving backend implementation of advanced wireless products. This role involves defining and improving design implementation flows, automation, and signoff methodologies, optimizing PPA metrics, and collaborating with other design teams. Requires extensive experience in VLSI physical design, proficiency in Synopsys tools, and scripting skills.

What you'd actually do

  1. As part of your job you will define and improve design implementation flows, automation and signoff methodologies.
  2. Technically Lead the physical design flow and implementation activities for complex VLSI chips, ensuring high performance and reliability.
  3. Optimize power, performance, and area (PPA) metrics through advanced techniques and tools.
  4. Analyze and resolve design issues related to Place and Route, timing, power, signal integrity, and manufacturability.
  5. Collaborate with other Intel design teams to ensure seamless integration and optimization of design specifications.

Skills

Required

  • BSc/MSc in electrical or computer engineering
  • 10+ years of VLSI physical design experience
  • Physical Design implementation flows
  • floorplanning
  • placement
  • routing
  • timing closure
  • Synopsys EDA tools
  • Python
  • Perl
  • TCL
  • STA
  • IR drop analysis
  • EM analysis
  • DRC/LVS
  • ECO flows
  • PPA optimization
  • managing and mentoring technical teams
  • problem-solving skills
  • attention to detail
  • communication skills
  • teamwork skills

Nice to have

  • Cadence experience

What the JD emphasized

  • 10+ years of hands-on experience in VLSI physical design
  • proven track record of successful projects working with advanced technology nodes
  • Excellent familiarity with all Physical Design implementation flows and techniques
  • Proficiency in Synopsys EDA tools