Physical Design Engineer

AMD AMD · Semiconductors · Shanghai, China · Engineering

This role is for a Physical Design Engineer at AMD, focusing on SOC solution delivery and implementation optimization. The engineer will lead PPA optimization and 3DIC solutions, and develop AI methods to improve FEINT and PD work efficiency. Experience with RTL-to-GDS, advanced process nodes, 3DIC design, and PPA optimization is preferred, especially in combining AI methods.

What you'd actually do

  1. Technical lead on challenge PPA optimization and 3DIC solution
  2. Develop AI methods to implement FEINT and PD work efficiency improvement

Skills

Required

  • SOC implementation experience
  • PPA optimization
  • 3DIC solution

Nice to have

  • Familiar with whole process of RTL-to-GDS
  • Knowledge of advanced process nodes, like 2nm and 3nm
  • Good knowledge for 3DIC design
  • Experience of PPA optimization for high performance or low power design
  • Experience advocating for technical solutions in a collaborative team environment, especially combining AI methods

What the JD emphasized

  • AI methods to implement FEINT and PD work efficiency improvement
  • combining AI methods