Job Details:
Job Description:
Join Intel as a Physical Design Engineer, where you will play a pivotal role in shaping the future of advanced semiconductor technology. As part of our innovative teams, you will drive the physical design implementation of custom IP and SoC designs, transforming RTL to GDS, ensuring designs are ready for manufacturing. Your contributions will optimize critical design metrics such as power, performance, and area, influence Intel's advanced process nodes and enabling cutting-edge solutions for our global customers. This role is your opportunity to make a meaningful impact at the forefront of semiconductor innovation.
Key Responsibilities
- Execute all phases of the physical design flow, including synthesis, floor planning, place and route, and clock tree synthesis.
- Perform static timing analysis, power/clock distribution, power and noise analysis, and reliability verification.
- Conduct comprehensive signoff processes, including layout verification, electrical rule checking, and formal equivalence verification.
- Collaborate with internal teams to analyze results and resolve design violations for current and future products.
- Develop and refine methodologies to enhance design workflows, automation, and overall productivity.
- Utilize industry-standard EDA tools for tasks such as timing closure, multiple power domain analysis, and design rule verification.
- Participate in the creation and continuous improvement of design solutions, ensuring robust and validated flows for successful tape-outs.
#DesignTechnologyPlatform
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Bachelor Degree (Master Degree preferred) in Electrical Engineering, Computer Engineering, Computer Science, or other related field of study.
- 2 years of relevant experience in silicon design/Physical design and/or TFM development
Experience in the following areas:
- Scripting skills using a programming language such as Perl, TCL, or Python
- Use of industry standard placement and routing CAD tools
Preferred Qualifications:
- Floor planning and power grid setup, Clock methodologies, IR droop and SI mitigation strategies, power and timing signoff conditions, and layout and reliability verification.
- VLSI circuits, design techniques, and sub-micron CMOS technologies
- Logic synthesis and automated place and route experience
- Logic equivalent verification debugging
- Logic design fundamentals
Take the next step in your career and join us in pushing the boundaries of what's possible in semiconductor design. Apply today to shape the future with Intel.
#DesignTechnologyPlatform
Job Type:
Experienced Hire
Shift:
Shift 1 (Malaysia)
Primary Location:
Malaysia, Penang
Additional Locations:
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
- ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.