Physical Design Engineer - AI Methodology

AMD AMD · Semiconductors · Santa Clara, CA · Engineering

This role focuses on applying AI/ML techniques, including LLMs and predictive models, to analyze and optimize CPU core Physical Design (PPA) across the full design flow (RTL to tape-out). The engineer will build tools and dashboards to track design metrics and improve methodologies, collaborating with design, CAD, and architecture teams.

What you'd actually do

  1. Leverage emerging AI and ML capabilities (including LLMs and predictive models) to develop methods & tools to analyze & optimize CPU core PPA across the full design hierarchy, from RTL through Physical Design, identifying root causes and optimization opportunities
  2. Accelerate convergence across synthesis, floor planning, place-and-route, timing closure, and signoff through AI-driven techniques
  3. Build and maintain structured databases (SQL/NoSQL) and web-based dashboards to track and visualize design metrics across large multi-tile CPU implementations
  4. Develop and improve physical design methodologies and customize EDA tool recipes across implementation steps
  5. Collaborate with geographically distributed teams across design, CAD, and architecture

Skills

Required

  • Physical design and timing background
  • Scripting proficiency to automate design flows — Python, Tcl, Perl
  • Structured data (SQL, JSON, REST APIs)
  • Web technologies (HTML/JS, data visualization)
  • Comfort with LLM-based development tools (Claude Code, Codex, Copilot, or similar AI-assisted workflows)

Nice to have

  • Understanding of CPU microarchitecture
  • Familiarity with industry EDA tools (PrimeTime, Fusion Compiler, Innovus or equivalent)

Other signals

  • AI/ML for physical design optimization
  • LLMs and predictive models for analysis
  • Accelerate convergence across synthesis, floor planning, place-and-route, timing closure, and signoff