Post-silicon Full-chip Validation Engineer

AMD AMD · Semiconductors · Austin, TX · Engineering

This role is for a Post-Silicon Full-Chip Validation Engineer at AMD, focusing on validating critical technologies for AMD EPYC data center CPUs that power AI and cloud workloads. The engineer will use agentic AI to develop validation test plans and workloads, debug issues, and contribute to validation infrastructure. The role requires experience in CPU/SoC post-silicon validation, programming skills (C/C++, Python), and familiarity with agentic AI concepts and tools.

What you'd actually do

  1. Validate Data Fabric, Security, and Virtualization features in AMD EPYC data center CPU SoCs
  2. Use agentic AI to develop validation test plans, test content, and workloads to verify feature functionality and quality
  3. Debug and help drive root-cause analysis for SoC-related issues in collaboration with cross-functional teams
  4. Test interactions across SoC features, firmware, operating systems, and virtualized environments
  5. Contribute to validation infrastructure improvements, including automation, configuration checks, and log analysis

Skills

Required

  • CPU or SoC post-silicon validation
  • agentic AI concepts and tools
  • C/C++
  • Python
  • lab experience with platforms, server operating systems, and virtualized environments
  • x86 microprocessor architecture and server SoC platforms
  • firmware
  • I/O
  • DDR
  • validation methods
  • test content
  • workloads
  • automation infrastructure
  • Linux
  • Windows Server environments
  • common lab equipment
  • oscilloscopes
  • logic analyzers
  • protocol analyzers
  • communication and collaboration skills

Nice to have

  • Data Fabric (coherency) validation and debug experience
  • Data center security validation experience
  • Virtualization validation experience
  • Confidential computing feature knowledge
  • Silicon debug experience
  • ability to create positive and negative test cases

What the JD emphasized

  • agentic AI