Power Analysis and Optimization Engineer

NVIDIA NVIDIA · Semiconductors · Shanghai, China

NVIDIA is looking for a Power Analysis and Optimization Engineer to help define power targets, find power saving opportunities, and solve power issues throughout the ASIC design process. This role involves understanding IP design, creating power models, and collaborating with various engineering teams to ensure product energy efficiency and competitive advantage.

What you'd actually do

  1. Understand Functionality, Architecture, Feature Algorithm and RTL implementation of IP design.
  2. Create dedicated IP-level Power model for early power estimation, if any architecture change or new added feature needed.
  3. Co-work with IP owner to define the power target with different workloads and application scenarios.
  4. Use internal-developed power flow and analysis tools to look for power saving opportunities; drive IP owner to implement the fixes.
  5. Explore new methodology to identify more wasted activities in the design and find solutions to save the power.
  6. Develop automation flow to help improve the efficiency of power analysis.

Skills

Required

  • MS with 1~3 years of experience or PhD in related fields
  • Basic understanding of the concept of power and common low power design techniques
  • Familiar with PTPX, PowerArtist and ASIC design flow including RTL coding, synthesis, P&R
  • Strong coding skills, preferably in Python, C++, tcl script
  • Good verbal/written English and communication skills

Nice to have

  • Low power design experience
  • Power Modeling/Analysis experience