Pre-silicon Verification Engineer

Intel Intel · Semiconductors · Texas, Austin, United States +1

This role focuses on the pre-silicon verification of CPU logic to ensure designs meet specification requirements. Responsibilities include developing IP verification plans, test benches, and verification environments, executing these plans using system simulation models, debugging issues in the presilicon environment, and collaborating with design and architecture teams. The role requires experience with Design Verification and Validation methodologies, UVM, System Verilog, and EDA tools.

What you'd actually do

  1. Performs functional verification of CPU logic to ensure design will meet specification requirements.
  2. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
  3. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
  4. Replicates, root causes, and debugs issues in the presilicon environment.
  5. Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.

Skills

Required

  • Bachelor's Degree in Electrical/Computer Engineering or related field with 3+ years of experience OR Master's in Electrical/Computer Engineering or related field with 2+ years of experience OR PhD in Electrical/Computer Engineering or related field
  • Design Verification and Validation methodologies
  • UVM
  • System Verilog
  • industry standard EDA tools
  • Pre-silicon verification
  • SoC validation

Nice to have

  • Scripting languages such as Python OR Perl
  • C/C++ System Verilog coding and debug
  • RTL development
  • System level boot flows
  • Power management
  • Computer-Architecture familiarity
  • Power Management flows including low power entry/exit, frequency change flows etc

What the JD emphasized

  • 3+ years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools
  • 3+ years of experience with Pre-silicon verification, SoC validation.