Principal AI Network Hw Systems Engineer

Microsoft Microsoft · Big Tech · Mountain View, CA +4 · Hardware Engineering

This role focuses on the hardware systems engineering for AI networking infrastructure, specifically for Microsoft's MAIA AI platform. The engineer will lead the architecture, bring-up, validation, and optimization of networking components (SerDes, optics, cables, NICs, switch silicon) to ensure high performance and reliability for large-scale AI training and inference. The position involves working across the hardware and software stack, influencing architectural direction, and evaluating future networking technologies for AI infrastructure.

What you'd actually do

  1. Own AI networking architecture for MAIA training and inference systems across scale-up and scale-out deployments.
  2. Lead integration and qualification of switches, NICs, PHYs, optics, cables, and high-speed SerDes technologies.
  3. Define validation strategies covering functionality, interoperability, performance, scale, reliability, and stress testing.
  4. Optimize AI fabric performance through analysis of latency, bandwidth utilization, congestion management, and collective communication efficiency.
  5. Drive debugging, telemetry, and automation solutions that improve network resiliency and operational excellence.

Skills

Required

  • Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 7+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience
  • 8+ years of experience in NW HW development
  • 8+ years of experience in GPU based SU/SO development
  • 8+ years of hands on experience with HS interface architecture and development

Nice to have

  • AI Infrastructure Experience
  • Experience developing GPU, FPGA, TPU, AI accelerator, or HPC-based systems.
  • Familiarity with AI workload communication patterns and collective operations.
  • Understanding of large-scale distributed AI training environments.
  • Optical & Interconnect Expertise
  • Deep knowledge of Optical transceivers (DR4, DR8, FR4)
  • DSP architectures
  • TIAs and drivers
  • Optical link budgets
  • OMA, TDECQ, receiver sensitivity analysis
  • Silicon photonics technologies
  • Co-packaged optics architectures
  • Experience with IEEE Ethernet standards
  • OIF specifications
  • CMIS management frameworks
  • Ultra Ethernet Consortium technologies
  • Future 224G and 448G ecosystems
  • Experience with hyperscale datacenter deployments.
  • Knowledge of ODM, CM, and supplier ecosystems.
  • Experience managing products through EVT, DVT, PVT, and production ramps.
  • Experience with Linux environments and automation frameworks.
  • Background developing telemetry, diagnostics, validation, and qualification tooling.
  • Familiarity with scripting and data analysis environments.

What the JD emphasized

  • AI networking architecture
  • MAIA AI platform
  • AI training and inference
  • networking infrastructure
  • AI fabric performance
  • large-scale distributed AI training environments

Other signals

  • AI training and inference at hyperscale
  • AI-native silicon and system-level solutions
  • AI fabric performance
  • next-generation AI networking infrastructure