Principal AI Silicon Architect

Microsoft Microsoft · Big Tech · Mountain View, CA +4 · Silicon Engineering

The Principal AI Silicon Architect role at Microsoft focuses on defining and delivering operational measures of success for hardware manufacturing, improving planning, quality, delivery, scale, and sustainability for Microsoft's cloud hardware. This involves driving high-performance AI silicon architecture direction, developing silicon architecture specifications for AI accelerators, and collaborating with AI software and hardware teams to optimize silicon architecture for current and future AI models. The role supports design, DV, emulation, firmware, and kernel development teams throughout the end-to-end silicon development cycle.

What you'd actually do

  1. Drive High-Performance AI Silicon Architecture direction
  2. Develop Silicon Architecture Specifications for AI Accelerator
  3. Develop functional and analytical models of silicon IP blocks
  4. Collaborate with AI Software and Hardware teams to drive the optimum silicon architecture for current and future AI Models
  5. Support and guide Design, DV, Emulation, Firmware, and Kernel development teams through End-to-End Silicon development cycle

Skills

Required

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience.

Nice to have

  • 10+ years of silicon architecture experience
  • Proven experience leading at least three end-to-end silicon programs through architecture, design, tape-out, bring-up, validation, and production readiness
  • Demonstrated ability to drive cross-functional collaboration across architecture, design, software, firmware, verification, product engineering, and system teams.
  • Deep understanding of current and emerging machine learning models and workloads for both training and inference
  • Recognized expertise in one or more of the following domains: Machine learning acceleration, including large-scale matrix multiplication, numerical formats and representations, parallel computing, and performance optimization. SIMD/SIMT vector processor architecture and microarchitecture. Scalable high-bandwidth Network-on-Chip (NoC) architectures and interconnect fabrics. Memory subsystem architecture, including HBM and high-bandwidth data movement.
  • Experience driving hardware/software co-design for AI and high-performance computing systems
  • Experience with high-power, large-scale SoC, and multi-chiplet architectures
  • System-level architectural thinking with the ability to balance performance, power, area, cost, and time-to-market tradeoffs
  • Experience defining and delivering AI accelerator, GPU, CPU, networking, or other high-performance silicon products

What the JD emphasized

  • 7+ years technical engineering experience
  • 10+ years technical engineering experience
  • 12+ years technical engineering experience
  • 10+ years of silicon architecture experience
  • Proven experience leading at least three end-to-end silicon programs through architecture, design, tape-out, bring-up, validation, and production readiness
  • Deep understanding of current and emerging machine learning models and workloads for both training and inference
  • Machine learning acceleration, including large-scale matrix multiplication, numerical formats and representations, parallel computing, and performance optimization.

Other signals

  • AI Silicon Architecture
  • AI Accelerator
  • AI Models
  • machine learning acceleration
  • training and inference