Principal Design Verification Engineer

Microsoft Microsoft · Big Tech · Mountain View, CA +2 · Silicon Engineering

This role is for a Principal Design Verification Engineer focused on verifying AI accelerators. The responsibilities include creating verification environments, developing test cases, and debugging simulation/emulation failures. While the role works with AI accelerators, the core craft is silicon verification engineering, not AI/ML model development.

What you'd actually do

  1. Creation of complex verification environments and tests, pre-silicon functional verification at the block, chip and system level, reference modeling and post-silicon validation.
  2. Interact with architects and design engineers to create verification plans covering strategy, test environments & tests, and verification requirements for IP/SS/SOC level verification.
  3. Create and drive test-plans and test development to provide complete features coverage.
  4. Develop and implement technical solutions to complex quality and design challenges.
  5. Develop verification components like scoreboards, sequences, constraints, assertions and functional coverage.

Skills

Required

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
  • Verilog or VHDL
  • C/C++
  • Python, Ruby or Perl
  • System Verilog
  • UVM

Nice to have

  • 9+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
  • 5+ years’ industry experience of chip and/or computer architecture.
  • CPU or Graphics core verification experience
  • In depth knowledge of verification principles, testbenches, stimulus generation, and coverage closure.
  • Experience with hardware design for embedded systems.
  • Firmware development, with secure and non-secure boot flow.
  • Experience with hardware emulation or FPGAs.
  • Design experience or ability to write synthesizable code.
  • Software development experience.
  • Excellent communication skills.

What the JD emphasized

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
  • This role will require access to information that is controlled for export under export control regulations