Principal Performance and Manufacturing Architect

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA +5 · Remote

This role focuses on architecting and validating performance and manufacturing processes for silicon products, with a secondary emphasis on applying AI to production engineering workflows. The primary goal is to ensure the connection between design intent and manufacturing reality, using first-principles models and rigorous validation to improve product yield and reliability at scale. While AI tools are mentioned as a way to stand out, the core of the role is in traditional silicon manufacturing and performance architecture.

What you'd actually do

  1. Own the physics, from mechanism to margin. Build first-principles models connecting AVF, defect mechanisms, and DVFS transients to field FIT, system-level yield, and DPPM vs. coverage — calibrated per node and population shift — so every margin term in the V/F curve and P-state table is named, sourced, and defensible.
  2. Set the screen that resolves escapes. Specify ATE and SLT voltage, frequency, and timing conditions that capture worst-case transient VF windows — making it unambiguous whether a marginal defect or timing violation is detected or escapes at every manufacturing stage.
  3. Make the POR the authoritative source. Author the methodology document for each program and drive alignment across build, product definition, reliability, and test engineering — so every team is making decisions from the same model.
  4. Prove the model before production. Own the per-release validation plan — split-screen experiments, sample sizes, statistical acceptance criteria, and production monitoring — through QS sign-off.

Skills

Required

  • 15+ years in silicon performance and manufacturing architecture
  • Deep understanding of transient VF behavior and its relation to defects and timing violations
  • Experience building first-principles models connecting physical parameters to manufacturing outcomes
  • Experience defining manufacturing test specifications on shipped products
  • Experience designing and running silicon validation experiments

Nice to have

  • Applied AI to production engineering workflows (model fitting, anomaly detection, specification generation)
  • Experience across VF specification and manufacturing boundary on multiple nodes
  • Led multi-functional alignment on methodology disagreements
  • Delivered innovative solutions under tight schedules

What the JD emphasized

  • built the models, defined the specs, and seen them validated through silicon
  • owned the connection between design intent and manufacturing reality
  • set the methodology and proved it worked
  • turn ambiguous physical phenomena into quantified, defensible margin terms
  • design the experiment that gets it
  • improve how the organization ships products after every program
  • Deep, hands-on understanding of how transient VF behavior develops worst-case stress conditions for marginal defects and timing violations
  • demonstrated experience building first-principles models connecting physical parameters to manufacturing outcomes, calibrated through real silicon
  • clear track record defining manufacturing test specifications on a shipped product, with each margin term explicitly sourced and owned
  • Built and ran silicon validation experiments that proved models from NPI through production, not as a supporting contributor, but as the person who developed and was responsible for the experiments