Principal Power and Performance Architect

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Principal Power and Performance Architect to influence, innovate, and drive next-generation power management and power features to market. This role involves architecting power management features from system architecture through design and productization, evaluating industry trends, driving system-level power optimizations, and leading power feature requirements from architecture to silicon phase. The ideal candidate will have extensive experience in silicon and product power, power modeling, and system-level power/performance analysis, with a background in datacenter markets being preferred.

What you'd actually do

  1. Architect next generation power management features and solutions, through system architecture, design, and productization; working with multi-functional teams across the company.
  2. Evaluate industry direction and use cases; identify opportunities and challenges in the area of power management and optimization to drive the future roadmap to build competitive products.
  3. Drive initiatives for system-level power optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from large-scale datacenters to low-power client devices.
  4. Lead the team for power feature requirements and schedule from architecture to silicon phase of projects, incorporating silicon feedback to improve the next generation.
  5. Develop methodologies for power modeling and measurement, characterization of power features, correlate silicon behavior with simulations, and provide design feedback.

Skills

Required

  • MS or PhD in EE, CE, CS, Systems Engineering or equivalent experience
  • Proven experience of 15+ years in the area of silicon and product power and power management
  • Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management
  • Background with system level features, product binning methods, optimization techniques, methods and tools for data analysis and statistics
  • Experience working on product level power and performance analysis and optimization
  • Experience working with offshore teams

Nice to have

  • Background with the market segments of datacenter is preferred
  • Familiarity with silicon bringup and validation, frequency and power characterization; hands-on post silicon experience is a plus
  • Exposure to CPU/GPU/SoC architecture and HW-SW co-design is a plus

What the JD emphasized

  • Experience working with offshore teams is required.