Overview
Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.
The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantage to Microsoft and enable our customers to achieve more.
As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the Silicon IP and Custom Products (SCIPS)** **team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.
We are looking for a Principal Silicon Design Verification Engineer to join the team.
Responsibilities
- Own the development of C and C++ based test content at the subsystem and SoC levels, including bare-metal bring-up code, directed and constrained-random test sequences, and self-checking tests that exercise complex multi-IP flows such as secure boot, key and fuse management, and processor and bus interactions.
- Build and maintain the C test infrastructure that the broader team relies on, including startup code, low-level drivers, register access layers, and the build flow (Makefiles, linker scripts, and toolchain setup) needed to compile and run firmware-style tests against the design.
- Own the pre-silicon verification strategy and execution for one or more security IP blocks and subsystems and their integration into the SoC, covering test planning, environment architecture, and signoff criteria from early design through tapeout and silicon bring-up.
- Architect and extend SystemVerilog and UVM environments that host C-based stimulus, connecting embedded test code to the testbench so processor-driven and stimulus-driven scenarios run together.
- Drive coverage signoff across functional, code, and power-aware coverage. Set goals, investigate and close gaps without unjustified exclusions, and apply constrained-random, formal, and gate-level techniques to find bugs and prove test plan completeness.
- Act as verification lead and technical point of contact for customer and partner teams, owning milestone delivery at both the IP and SoC levels, keeping releases on schedule.
- Mentor and guide less experienced engineers by reviewing test plans, C and SystemVerilog code, debug work, onboarding new team members, and establishing verification best practices the broader team can reuse.
- Improve verification efficiency by building reference and prediction models, automation, and debug tooling in Python and other scripting languages, and by correlating pre-silicon C test results with FPGA prototyping platforms to accelerate firmware bring-up and post-silicon validation.
Qualifications
Required/minimum qualifications
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
Other Qualifications:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Preferred Qualifications:
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience.
- Experience developing tests in C/C++, SystemVerilog, and UVM, with emphasis on C/C++ test content for subsystem and SoC verification.
- Experience leading pre-silicon verification of IP, subsystems, and SoCs through the full cycle, including SoC-level testbench development, test planning, and coverage signoff.
- In-depth knowledge of verification principles, testbench architecture, and stimulus generation, with a track record of debugging complex designs.
- Experience directing and mentoring individual engineers.
- Experience collaborating across architecture, design, block-level DV, and firmware teams to execute functional verification, with communication skills.
- Understanding of silicon and/or computer architecture.
- Proficiency in a scripting language such as Python, Ruby, or Perl.
- Experience with emulation, FPGA prototyping (such as HAPS or Xilinx), RTL design for FPGA or emulation, or post-silicon validation.
- Experience with assembly, startup code, linker scripts, and Makefile-based build flows for software development.
- Familiarity with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C, or USB.
- Hands-on hardware debug experience with tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: https://careers.microsoft.com/us/en/us-corporate-pay
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about **requesting accommodations.**