Principal/ Sr. Principal Fpga Design Engineer

Northrop Grumman Northrop Grumman · Aerospace · Rolling Meadows, IL +1 · Engineering Mult-Func

Northrop Grumman is seeking an FPGA Design Engineer with signal processing experience to join their team. The role involves research, requirements analysis, systems architecture, design, coding, test bench design, verification, synthesis, and place & route for digital signal processing products. Responsibilities include working with digital subsystem and circuit card designs utilizing the latest FPGA technologies, supporting high-speed interfaces, RF and EO DSP, controls, data links, embedded processing, and processor interfaces. Expertise in digital signal processing, modeling and simulation, and circuit level design and test are desired.

What you'd actually do

  1. research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our digital signal processing products
  2. working with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Intel (Altera), and Microsemi (Actel)
  3. support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces
  4. digital signal processing, modeling and simulation, and circuit level design and test are desired for this position

Skills

Required

  • Bachelors’ degree in Electrical Engineering, Computer Engineering or similar engineering discipline
  • minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience (for Level 3)
  • minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience (for Level 4)
  • In-depth knowledge of VHDL and/or Verilog
  • Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++
  • Expertise achieving timing closure on dense FPGA designs
  • Working knowledge of DSP structures and techniques
  • Proficient in Python, C or other scripting languages
  • Extensive experience generating test benches
  • Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
  • Experience with FPGA simulation tools to verify performance of complex RTL blocks
  • Experience with Xilinx or Intel/Altera FPGA architectures and design tools
  • Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally

Nice to have

  • Current or Active Top Secret with SCI/SAP security clearance
  • Extensive experience implementing Digital Signal or Image Processing algorithms on FPGAs
  • Extensive experience with high-speed interfaces: Ex. AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, etc.
  • Working knowledge of SDR platforms and architectures
  • Extensive experience developing FPGA algorithms for SoC based architectures
  • Experience developing FPGA/SW interfaces and controls
  • Experience developing and prototyping in MATLAB/Simulink
  • Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools.
  • Experience and knowledge developing requirements for FPGA-based products
  • Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.
  • Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)
  • Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest

What the JD emphasized

  • Must be a US Citizen with ability to obtain and maintain Top Secret security clearance with SCI