Research Scientist, ML H-w/s-w Codesign

Meta Meta · Big Tech · Sunnyvale, CA

Research Scientist role focused on AI model-hardware codesign for AR/VR/wearable devices. The role involves optimizing AI models for compute and power efficiency, focusing on both training and on-device inference of vision and language models. This requires deep understanding of algorithms, hardware architecture, and system integration.

What you'd actually do

  1. Identify and solve multi-discipline ML acceleration problems involving algorithms, network design, hardware architecture, multimodal AI and AR/VR use cases.
  2. Work across hardware and software, to solve co-design problems with other Research scientists working in this area
  3. Codesign and invent novel ML accelerator and system architecture solutions, and facilitate the integration of algorithms and software to utilize these enhancements
  4. Develop state-of-the-art model compression and scalability techniques using Numerics, pruning, distillation etc
  5. Optimize models on hardware accelerators to achieve target performance given various real time latency and power constraints

Skills

Required

  • PhD in Electrical Engineering, Computer Science, or relevant technical field, or equivalent practical experience
  • Experience developing AI-System infrastructure, AI algorithms or AI hardware acceleration in C/C++ or Python
  • Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
  • Experience working and communicating cross-functionally in a team environment
  • Demonstrated research and engineering experience via an internship, work experience, coding competitions, or widely used contributions in open source repositories (e.g. GitHub)
  • Experience with PyTorch, TensorFlow or similar machine learning toolsets
  • Experience or knowledge of training/inference of Large scale AI models - CV and/or LLMs
  • Experience or knowledge of architecting ML hardware accelerators and systems
  • Experience evaluating alternative system or algorithm designs by analyzing trade-offs in performance, power, and latency to recommend a solution
  • Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
  • Proven track record of achieving significant results as demonstrated by grants, fellowships, patents, as well as publications at leading workshops, journals or conferences such as ICLR, NeurIPS, CVPR, ACL, ICML, MLSys, ISCA, MICRO, DAC, ASPLOS etc
  • Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
  • Experience or knowledge of on-device algorithm development including hardware-aware ML models and/or optimizing ML compilers for efficient deployment on AI accelerators

Nice to have

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience

What the JD emphasized

  • novel approaches not yet established in the industry
  • state-of-the-art model compression and scalability techniques
  • target performance given various real time latency and power constraints
  • Apply in-depth knowledge of how the ML acceleration interacts with the other systems around it
  • contribute to patents and/or publications in peer-reviewed conferences and journals

Other signals

  • AI model-hardware codesign
  • compute performance and power efficiency
  • on-device AI capabilities
  • training and on-device inference of vision and language models