Rtl Design Engineer With Upf ( Unified Power Format )

AMD AMD · Semiconductors · Hyderabad, India · Engineering

This role is for a Senior Silicon Design Engineer focused on RTL design and UPF for FPGA products at AMD. The engineer will collaborate on front-end design methodologies, enhance UPF analysis flows, and leverage corporate AI systems for productivity. Experience in logic design, static verification, and UPF is required, along with programming skills in Perl, Python, and TCL.

What you'd actually do

  1. Collaborate with the design team to drive continuous improvements in front-end design methodologies, ensuring top-quality RTL across areas such as Lint, CDC, formal equivalence, and low-power verification.
  2. Enhance and develop flows that analyze RTL and Unified Power Format (UPF) Files, including updating or creating new UPF to enable robust verification of power-domain crossings for AMD's next-generation monolithic and stacked FPGA-SoC product families.
  3. Leverage corporate AI systems to increase productivity and streamline workflows.

Skills

Required

  • SystemVerilog, Verilog, or VHDL
  • IEEE 1801 Unified Power Format (UPF)
  • Perl, Python, and TCL
  • Bachelor's degree in Electrical or Computer Engineering

Nice to have

  • Master's degree preferred