Rtl Design & Micro-architecture Engineer

Intel Intel · Semiconductors · Guadalajara, Mexico

RTL Design & Micro-Architecture Engineer for next-generation scalable data centers supporting AI workloads. Responsibilities include RTL design, coding, simulation, integration, and verification of SoC designs. Requires System Verilog, digital design fundamentals, and simulation tools.

What you'd actually do

  1. Develop the logic design, register transfer level (RTL) coding, and simulation for SoC designs.
  2. Integrate logic from IP blocks and subsystems into full chip SoC or discrete component designs.
  3. Participate in defining architecture and microarchitecture features for designed blocks.
  4. Perform quality checks across RTL to ensure timing, power convergence, and design integrity.
  5. Write and optimize RTL code to meet power, performance, area, and timing goals.

Skills

Required

  • RTL design and coding using System Verilog
  • Digital design fundamentals and microarchitecture principles
  • Simulation tools and methodologies (VCS, QuestaSim, etc ...)
  • Verification workflows
  • Advanced English level

Nice to have

  • Demonstrated ability to collaborate across IP and cross-functional teams
  • Experience optimizing designs for power, performance, and area targets
  • Knowledge of UVM basics
  • SoC system architecture and microarchitecture
  • Logic synthesis, timing analysis, and SDC
  • AXI/APB interfaces
  • IP Design and Integration

What the JD emphasized

  • unrestricted, permanent right to work in Mexico