Security and Safety Circuit Engineer

NVIDIA NVIDIA · Semiconductors · Shanghai, China

This role focuses on developing and validating silicon security and safety circuits for NVIDIA's products. While the core function is hardware engineering, the role explicitly seeks experience in applying AI-driven methodologies and AI-assisted workflows to semiconductor co-design and validation problems, indicating an exploration of AI's application in this domain.

What you'd actually do

  1. Develop end-to-end pre-silicon and post-silicon validation methodologies, processes, and workflows for system-level silicon security and safety circuit characterization, including voltage, clock, power and fault monitors/detection etc.
  2. Drive the translation of new circuit features into clear productization requirements, dependencies, validation scope, and signoff criteria for silicon characterization test plans and productization methodologies.
  3. Define validation strategies for analog, digital, and mixed-signal circuits, as well as new silicon features, with a strong focus on bring-up readiness and scalable execution.
  4. Design and develop tools to automate characterization, data collection, test execution, and result analysis to improve efficiency, quality, and coverage.
  5. Continuously explore and apply innovative approaches, including AI-driven methodologies, to solve complex design challenges and improve validation quality, efficiency, and scalability.

Skills

Required

  • BS or MS in Electrical Engineering, Computer Engineering, or equivalent experience.
  • 5+ years of experience in a related hardware engineering role
  • Proven ability to collaborate and communicate effectively across cross-functional teams.
  • Excellent problem-solving, post-silicon debug, collaboration, and interpersonal skills.

Nice to have

  • Familiarity with Perl, C/C++, tool and script development, and Windows/Linux environments is a plus.
  • Knowledge of AI-assisted workflows for accelerating automation, data analysis, root-cause investigation, and documentation.
  • Background in pre-silicon/FPGA circuit feature validation, RTL design and verification
  • Experience in Post-Silicon validation, SW&HW feature development
  • Experience working with GPU/CPU/Memory/Analog system features and crafting test strategies.

What the JD emphasized

  • strong exposure to silicon security and safety architecture
  • Deep understanding of GPU/SoC system-level architecture
  • Hands-on experience with hardware-software interactions for initialization, fault handling, and debug, including but not limited to safety and security monitor circuits, reset and fault-handling architecture, fuse and register programming flows, post-silicon validation, and production test / ATE correlation.
  • Strong silicon lab experience, including silicon bring-up, frequency and power characterization, correlation, automation scripting, and use of lab equipment such as oscilloscopes, probes, and DAQ tools.
  • Experience applying AI to semiconductor co-design and validation problems