Senior Analog and Mixed Signal Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Analog and Mixed Signal Engineer to design high-speed interfaces and complex mixed-signal circuits for GPUs. The role involves architecture development, transistor-level circuit design, simulation, physical design collaboration, and silicon evaluation, utilizing state-of-the-art CMOS technologies and EDA tools.

What you'd actually do

  1. You will work as part of a team to design and implement high speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools:
  2. High speed analog and hybrid Phase Locked loops and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, bandgap, TDC, interpolator circuits, high speed buffers etc.
  3. Design of data converters (analog-to-digital and digital-to-analog converters). Contribute to architecture development and transistor level circuit design of associated blocks like comparators, digital state machines, high performance op-amps etc.
  4. Work closely with mask design engineers to deliver the physical design as well as work with characterization groups for silicon evaluation.
  5. Help support technology transfer to product development teams.

Skills

Required

  • BSEE or equivalent experience
  • 6+ years of industry experience in deep-submicron CMOS technologies
  • Hands-on design experience in performance analog and hybrid Phase Locked Loops, analog-to-digital (ADC), digital-to-analog (DAC) data converter
  • Experience in all types of analog subcells is considered, VCO, LDO, bandgap, chargepump, opamps, interpolator circuits
  • Have experience in deep sub-micron process
  • Experience with simulation tools such as spectre, hspice, AFS, and MATLAB, System Verilog, Python
  • Proficient with Cadence custom circuit design tools like ADE-L and ADE-XL
  • Understanding and experience in running Monte-Carlo, noise simulations and stability analysis
  • Capable of understanding DRC and LVS results with verification tools (Calibre, ICV, or like)
  • Ability to work effectively in a team, with good interpersonal skills, enthusiasm and positive energy

Nice to have

  • MS preferred
  • digital PLL
  • TDC or DSP and control theory experience related to digital PLLs
  • Proficient in scripting languages like Perl, Python, matlab etc.

What the JD emphasized

  • Analytical and intuitive understanding of transistor level analog design, layout and simulation is required.