Senior Analog Layout Design Engineer

NVIDIA NVIDIA · Semiconductors · Yokneam, Israel

NVIDIA is looking for a Senior Analog Layout Design Engineer to perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools. The role involves working with ASIC and mixed-signal engineers to customize designs for integration in VLSI products, including floor planning, custom layout, and verifying against design rules and schematics, and EM/IR analysis. Requires a minimum of 8 years of relevant mask analog layout experience, an Electronics Practical Engineer certificate or B.Sc. in Electrical Engineering, proven understanding of analog circuit layout concepts, expertise with Cadence custom circuit design tools (Virtuoso), and experience with DRC/LVS verification tools.

What you'd actually do

  1. Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools
  2. You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
  3. Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis

Skills

Required

  • 8 years of relevant mask analog layout experience
  • Electronics Practical Engineer certificate or B.Sc. in Electrical Engineering
  • Analog circuit layout concepts in submicron CMOS technologies
  • Cadence custom circuit design tools (Virtuoso)
  • DRC and LVS with verification tools (ICV, Calibre)

Nice to have

  • scripting languages like python, skill
  • DRC and LVS checking flows
  • EM/IR tools
  • ability to customize DRC and LVS decks

What the JD emphasized

  • minimum of 8 years of relevant mask analog layout experience
  • An Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering
  • Proven understanding of analog circuit layout concepts in submicron CMOS technologies - such as Operational Amplifiers and ADC/DACs.
  • You are an expert with Cadence custom circuit design tools - particularly Virtuoso
  • Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre