Senior Asic Design Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA +2

Senior ASIC Design Engineer role at NVIDIA focusing on Switch Silicon chips, involving RTL implementation, micro-architecture, and collaboration with various engineering teams. Requires significant experience in ASIC design flows and high bandwidth data paths.

What you'd actually do

  1. As a key member of our Switch design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
  2. Analyze architectural trade-offs based on features, performance requirements and system limitations.
  3. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  4. Collaborate with architects, verification engineers, formal engineers, physical design engineers, and software engineers to accomplish your goals.

Skills

Required

  • Bachelors or Master's Degree or equivalent experience in Electrical Engineering or Computer Engineering
  • 8+ years of relevant work experience
  • Experience in micro-architecture and RTL development (Verilog and/or SystemVerilog)
  • focus on high bandwidth data paths
  • A deep understanding of ASIC design flows including RTL design, verification, logic synthesis and timing analysis
  • Strong interpersonal skills

Nice to have

  • Proven experience in switching silicon and high bandwidth data path design
  • data movement
  • arbitration
  • scheduling
  • link list based designs
  • Knowledge of networking protocols and networking architectural concepts
  • Good debugging and analytical skills

What the JD emphasized

  • high performance, area and power efficient RTL
  • high bandwidth data paths
  • ASIC design flows
  • RTL design
  • verification
  • logic synthesis
  • timing analysis
  • switching silicon
  • high bandwidth data path design
  • data movement
  • arbitration
  • scheduling
  • link list based designs