Senior Asic Design Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior ASIC Design Engineer to design and implement world-leading SoCs and GPUs. The role involves architecture, micro-architecture, RTL design, synthesis, logic and timing verification, and test bench development. This position requires a strong hardware engineering background with expertise in VLSI, Computer Architecture, Verilog/System Verilog, and verification methodologies.

What you'd actually do

  1. You will document, implement, and deliver fully verified, high performance, area and power efficient RTL to achieve the design targets and specifications.
  2. Your responsibilities will include architecture and micro-architecture design, RTL design and synthesis, and logic and timing verification using pioneering CAD tools and semiconductor process technologies.
  3. In addition to the design role, you will participate in the verification of the design using sophisticated verification methodologies.
  4. You are expected to help define the verification scope and support the development of verification infrastructure.
  5. You will collaborate with several ASIC development teams and will need to communicate and coordinate with members of those teams, some of whom are in remote locations.

Skills

Required

  • Bachelors or Masters Degree (or equivalent experience)
  • 5+ years of relevant / meaningful work experience
  • Proven hardware engineering background with a concentration in VLSI and Computer Architecture
  • Expertise in Verilog, System Verilog or similar HDL
  • Proficient programming in Perl/Python (or similar scripting languages)
  • Experience with logic synthesis and timing analysis
  • Exposure and firsthand work experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, GDB)
  • Experience with test bench environments for unit and system level verification
  • Good debugging and analytical skills
  • Strong interpersonal skills and ability to work with on-site and remote teams

Nice to have

  • working on embedded processors
  • verification using random stimulus along with functional coverage and assertion-based verification methodologies

What the JD emphasized

  • design and implement the world’s leading SoC's and GPU's
  • architecture and micro-architecture design
  • RTL design and synthesis
  • logic and timing verification
  • verification of the design
  • verification methodologies
  • verification scope
  • verification infrastructure
  • design and verification tools
  • test bench environments
  • unit and system level verification
  • random stimulus along with functional coverage and assertion-based verification methodologies