Senior Asic Design Engineer - Lpu

NVIDIA NVIDIA · Semiconductors · Canada · Remote

Senior ASIC Design Engineer role at NVIDIA, focusing on implementing high-performance, area, and power-efficient RTL for SoCs, GPUs, and ASICs. The role involves micro-architecture design, RTL implementation, verification, and collaboration with various engineering teams. It specifically mentions working on critical designs integral to LLM performance, such as real-time numeric processing and data flow processing.

What you'd actually do

  1. As a key member of our Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
  2. Analyze architectural trade-offs based on features, performance requirements and system limitations.
  3. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  4. Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.
  5. Work on critical designs which are integral to our LLM performance such as real-time numeric processing, data flow processing, interrupt controllers, and DMA engines.

Skills

Required

  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science
  • 8+ years of relevant work experience
  • Micro-architecture and RTL development (Verilog)
  • Arbiters, scheduling, synchronization & bus protocols and interconnect networks
  • ASIC design flow (RTL design, verification, logic synthesis, low-power design, timing analysis)
  • Digital systems and VLSI design
  • Computer Architecture
  • Computer Arithmetic

Nice to have

  • Numerics
  • Confidential compute
  • Dataflow architectures
  • CPU subsystems

What the JD emphasized

  • 8+ years of relevant work experience
  • Experience in micro-architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols and interconnect networks.
  • Great understanding of ASIC design flow including RTL design, verification, logic synthesis, low-power design and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.