Senior Asic Design Engineer, Memory Controller

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior ASIC Design Engineer to design and implement Memory Controllers for NVIDIA's Tegra SoCs, impacting product lines from consumer graphics to self-driving cars and AI. Responsibilities include micro-architecture, RTL design, synthesis, functional verification, and timing analysis.

What you'd actually do

  1. As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers to and deliver an extraordinary solution.
  2. In this position, you will have the opportunity to be responsible for micro-architecture and design including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using the latest process technologies.

Skills

Required

  • BS, MS, or PhD in Electrical Engineering, Computer Engineer, or related degree required (or equivalent experience)
  • 3+ years of relevant and proven ASIC design experience
  • background in DRAM memory and/or processor design (Graphics, Microprocessors, Network Processors, or Mobile / Multimedia SOCs)
  • Extensive experience in micro-architecture and RTL development
  • Relevant experience with various stages in the ASIC design flow including functional and formal verification, emulation, synthesis & timing analysis, power estimation and ECO
  • Strong understanding with Verilog or System Verilog
  • Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and circuits
  • Programming skills in C and/or PERL/PYTHON
  • Good communication skills and interpersonal skills

Nice to have

  • Background with DDR, LPDDR, GDDR, or HBM memories
  • Knowledge of working with Mixed signal circuit integration and verification
  • Experience with RISCV or ARM processor architecture
  • Silicon Bring up & lab debug experience

What the JD emphasized

  • ASIC design experience
  • DRAM memory
  • processor design
  • micro-architecture
  • RTL development
  • functional and formal verification
  • emulation
  • synthesis & timing analysis
  • power estimation
  • ECO
  • Digital systems
  • VLSI design
  • Computer Architecture
  • Computer Arithmetic
  • CMOS transistors and circuits