Senior Asic Design Engineer - Noc Ip

NVIDIA NVIDIA · Semiconductors · Bangalore, India

Senior ASIC Design Engineer at NVIDIA working on memory subsystem components for Graphics Processors. This role involves micro-architecture, RTL development, verification, and collaboration with various engineering teams throughout the ASIC design flow.

What you'd actually do

  1. Own micro-architecture and RTL development of design modules.
  2. Micro-architect features to meet performance, power and area requirements.
  3. Work with HW architects to define critical features.
  4. Collaborate with verification teams to verify the correctness of implemented features.
  5. Co-operate with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable.

Skills

Required

  • BS / MS or equivalent experience
  • 7+ years of design experience
  • Experience in RTL design of complex design units for at least two or three projects
  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB)
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug
  • Expertise in Verilog

Nice to have

  • Design experience in memory subsystem or network interconnect IP
  • Good debugging and problem solving skills
  • Scripting knowledge (Python/Perl/shell)
  • Leadership experience in leading small 2-3 member teams
  • Good interpersonal skills and ability & desire to work as a part of a team

What the JD emphasized

  • 7+ years of design experience
  • Deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug
  • Expertise in Verilog