Senior Asic Design Infrastructure & Methodologies Engineer, Mla-mi - Annapurna Labs

Amazon Amazon · Big Tech · Austin, TX · Software Development

This role focuses on designing and developing SOCs for AI workloads, specifically by automating design flows and building large-scale solutions to accelerate silicon development. The engineer will enhance and build design flows, collaborate with architects and designers, and evaluate/qualify new design tools.

What you'd actually do

  1. Develop and implement new methodologies and infrastructure to empower design teams to operate efficiently while maintaining high-quality standards.
  2. Enhance and build design flows to boost the overall productivity of design teams.
  3. Collaborate with vendors to evaluate and qualify new design tools and updated tool versions.

Skills

Required

  • ASIC implementation
  • synthesis
  • STA
  • physical design
  • digital design
  • communication systems
  • full-custom analog or RF layout
  • wireless communications systems and implementation
  • Post-Silicon Flow
  • verification in communication systems
  • UVM
  • C
  • System C
  • scripting

Nice to have

  • Master's degree or Ph.D. degree in Electrical Engineering or related field
  • RTL coding and debug
  • performance, power, area analysis and trade-offs
  • modern ASIC/FPGA design and verification tools
  • SOC bring-up and post-silicon validation

What the JD emphasized

  • deep sub-micron nodes (16nm or smaller)
  • automation frameworks for Post-Silicon Flow