Senior Asic Design Verification Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior ASIC Design Verification Engineer for NVIDIA's GPUs and SoCs, focusing on IP verification and developing AI frameworks for DV workflows.

What you'd actually do

  1. Work as part of Circuit Solutions Group to develop various innovative IPs for hardware security, clocking, voltage regulation and silicon correlation.
  2. Own the unit and sub-system level verification of various IPs, create functional test plans, and verify using advanced verification tools, flows and methodologies.
  3. Build and reform world class verification infrastructure and methodologies to meet the unique demands of custom designed IPs.
  4. Engage in design specification development by participating in discussions on architecture, intent, and implementation of the various IPs.
  5. Enable system level integration by working with partner teams for test development & debug and delivering Verification IPs.

Skills

Required

  • Verilog
  • System Verilog
  • UVM
  • SVA
  • VCS
  • Questa
  • Object Oriented Programming
  • debugging
  • analytical skills

Nice to have

  • Perl
  • Tcl
  • Make files
  • scripting
  • agentic AI workflows
  • LLMs
  • behavioral real number modeling
  • mixed signal designs
  • VCS-XA
  • Gate Level Simulation
  • Formal Equivalence
  • co-simulation environments

What the JD emphasized

  • BSEE (or equivalent experience) with 5+ years' experience in unit level or sub-system level verification or MS preferred in Electrical, Computer Engineering with 3+ years’ experience in unit level or sub-system level verification.
  • Proficiency in Object Oriented Programming, Verilog, System Verilog, UVM, SVA and functional coverage development.
  • Strong skills with VCS or equivalent simulation tools like Questa is required.
  • Strong debugging and analytical skills are required.