Senior Asic Design Verification Engineer - Lpu

NVIDIA NVIDIA · Semiconductors · Canada · Remote

NVIDIA is seeking an experienced Senior ASIC Design Verification Engineer to verify the design and implementation of inference accelerators. The role involves using advanced verification methodologies, collaborating with cross-functional teams, and potentially applying machine learning to the verification process. The focus is on ensuring the correctness of ASIC designs for high-performance processors.

What you'd actually do

  1. As a key member of our ASIC Verification team, you will verify the design and implementation of inference accelerator
  2. You will be responsible for verification of the ASIC design, architecture, reference models and micro-architecture using advanced verification methodologies
  3. Understand the design and implementation of your unit, define the verification scope, develop the verification infrastructure and verify the correctness of the design
  4. Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks
  5. Implement and optimize automated verification flows to improve productivity and efficiency

Skills

Required

  • Bachelors Degree in EE, CS or CE (or equivalent experience)
  • SystemVerilog
  • Universal Verification Methodology (UVM)
  • VCS, Verdi or equivalent design and verification tools
  • debug and analytical skills
  • random stimulus
  • functional coverage
  • assertion-based verification methodologies
  • ASIC design flow

Nice to have

  • UPF power verification
  • netlist and DFT verification
  • Perl/Python
  • C/C++ programming language
  • applying machine learning to ASIC verification flow

What the JD emphasized

  • 8+ years of relevant industry experience
  • Expertise in SystemVerilog and Universal Verification Methodology (UVM)
  • Knowledge of applying machine learning to ASIC verification flow