Senior Asic Methodology Engineer - Lpu Division

NVIDIA NVIDIA · Semiconductors · Canada · Remote

This role focuses on inventing and pioneering AI-driven and sophisticated automation techniques to transform the way ASICs are conceived, explored, and brought to closure, improving predictability, convergence, and turnaround time in the ASIC development lifecycle. The role involves identifying and leveraging data for AI models, establishing metrics, sharing best practices, and tracking advances in AI and hardware design research.

What you'd actually do

  1. Take a comprehensive view of the ASIC development lifecycle, identifying cross-stage bottlenecks and opportunities where automation and AI can improve predictability, convergence, and turnaround time.
  2. Identify, curate, and leverage real-time data to enable effective AI models and analytics, working with infrastructure teams to ensure scalable and secure data pipelines.
  3. Establish quantitative metrics to measure efficiency, quality, and cycle-time improvements; use data-driven insights to guide methodology decisions and prioritize investments.
  4. Serve as a technical catalyst within both the team and the wider company by sharing best practices, publishing internal guidelines, and mentoring engineers on emerging AI-enabled development techniques.
  5. Track advances in AI, EDA, and hardware design research, evaluating their applicability and guiding strategic bets that align with long-term product and technology roadmaps.

Skills

Required

  • Bachelor's or Master's degree in Computer Science, Computer Engineering, or Electrical Engineering (or equivalent experience)
  • 5+ years of proven industry experience
  • A proven track record developing groundbreaking ASIC design frameworks and flows
  • High-level programming skills including experience with Python, PERL, Make, and shell scripting
  • Experience with AI frameworks including knowledge of agentic flow development

Nice to have

  • First-hand experience with RTL, functional verification, formal verification, or physical design

What the JD emphasized

  • AI-driven hardware development methodology
  • AI models and analytics
  • AI-enabled development techniques
  • agentic flow development

Other signals

  • AI-driven hardware development methodology
  • AI models and analytics for ASIC development
  • AI-enabled development techniques