Senior Asic Verification Engineer

NVIDIA NVIDIA · Semiconductors · Bangalore, India

Senior ASIC Verification Engineer for NVIDIA's next-generation GPU and SOC IPs, focusing on High-Speed Test Access Mechanism (TAM) verification for various testing stages and silicon lifecycle management.

What you'd actually do

  1. Understand architecture/design and write test plans that are efficient yet exhaustive in coverage.
  2. Development of test environment such as creation/modification of testbench, updates to software sequences, creation/integration of checkers from UV.
  3. Execute the test plan, review results with arch/design teams for final signoff.
  4. Close collaboration with Emulation/FPGA teams to enable our tests and verify the tests on post silicon.
  5. Innovative optimizations to reduce simulation time and improve verification work flows.

Skills

Required

  • B.Tech/M.Tech or equivalent experience
  • 4+ years of relevant experience
  • Expertise in verification at sub-system/SOC level
  • Expertise in Verilog and SystemVerilog
  • Expertise in debugging functional and toggle coverage
  • Proficiency in grasping feature requirements for intricate features at the system level and devising test plans to validate them
  • Strong problem-solving skills
  • Strong interpersonal and team building skills with proficiency in written and verbal communications

Nice to have

  • Some experience in UVM is good to have
  • Grasp of system architecture concepts in the context of fullchip verification, like interrupts, error collators, handshakes, IO handling etc.
  • Expertise in protocols like APB/AXI/CHI
  • Experience with JTAG and DFT concepts like mbist/lbist