Senior Asic Verification Engineer

NVIDIA NVIDIA · Semiconductors · Austin, TX

Senior ASIC Verification Engineer role at NVIDIA, focusing on verifying and improving verification methodologies for system-level IPs. Requires expertise in System Verilog, UVM, Python, and RTL design.

What you'd actually do

  1. Design and maintain the unit level/sub-system Verification environment.
  2. Understand the architecture specifications, develop and carry out the test plan to verify the design.
  3. Create UVM components, sequences, tests and scoreboards.
  4. Sign off on the verification efforts with very high-quality code and functional coverage.
  5. Launch regressions, resolve the issues, and make forward progress towards achieving the DV milestone targets

Skills

Required

  • System Verilog
  • UVM
  • OOPS based programming
  • Python
  • scripting languages
  • RTL design (Verilog)
  • computer architecture fundamentals
  • verification tools (VCS or equivalent)
  • debug tools (Verdi)

What the JD emphasized

  • very high-quality code
  • highest quality delivery