Senior Asic Verification Engineer

NVIDIA NVIDIA · Semiconductors · Austin, TX

Senior ASIC Verification Engineer role at NVIDIA, focusing on verifying global IP across various product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI. Responsibilities include developing test plans, verification infrastructure, and ensuring functional correctness and performance expectations are met. Requires 5+ years of experience in pre-silicon verification, ASIC design flow, and scripting languages like Perl or Python.

What you'd actually do

  1. Develop test plans, tests and verification infrastructure for verifying global IP across multiple products
  2. Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify generated RTL
  3. Ensure code and functional coverage of all the RTL which you will verify
  4. Build verification components using SV/UVM methodology
  5. Driving coverage-based verification closure

Skills

Required

  • BS/MS in Electrical or Computer Engineering (or equivalent experience)
  • 5+ years of proven design verification experience
  • Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
  • Programming and scripting experience in Perl or Python
  • Excellent debugging and analytical skills
  • Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
  • Strong communication and collaboration skills to interact within the team and across functional teams

Nice to have

  • Previous experience automating tasks in the design verification process
  • Hands on experience in object-oriented programming
  • Prior design or verification experience at the IP or block level
  • Experience developing methodologies used by others
  • Demonstrated ability to drive a project to completion

What the JD emphasized

  • 5+ years of proven design verification experience
  • Experience in pre-silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
  • Programming and scripting experience in Perl or Python