Senior Asic Verification Engineer - GPU

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior ASIC Verification Engineer to verify the process scheduling and system interface hardware of GPUs, working across software, architecture, design, and methodology teams. The role involves unit level verification, directed and random tests, test infrastructure development, and partnering with RTL and architecture teams. It also includes architecting verification strategies, supporting post-silicon validation, and leveraging AI for testbench development and automation.

What you'd actually do

  1. Work on a unit level testbench, working on directed and random tests and test infrastructure, and contributing to the future direction of the methodology for the testbench
  2. Partner closely with RTL and architecture teams to help refine the microarchitecture plans to ensure that changes to the design are verifiable
  3. Architect and plan the verification strategy and execution for sub-system features impacting your unit
  4. Support post-silicon validation activities
  5. Harness cutting-edge AI to accelerate testbench development, task automation, debugging and problem-solving in a paradigm-shifting way

Skills

Required

  • BS or MS in electrical engineering or computer engineering or similar area (or equivalent experience)
  • 5+ years of verification experience
  • Exposure to Computer Architecture, ASIC design and verification methodology is required
  • Strong ability with SystemVerilog, test planning, coverage closure, and test bench design
  • Understanding of object oriented programming concepts
  • Strong communication skills
  • Ability and desire to work as a great teammate
  • Good debugging and problem solving skills

Nice to have

  • Experience with assertion-based verification, Semiformal Verification (SFV), Unified Verification Methodology (UVM), SystemVerilog checkers and scoreboards
  • Perl or Python knowledge
  • Experience with multiple verification methodologies
  • Leadership experience

What the JD emphasized

  • verification experience
  • Computer Architecture
  • ASIC design
  • verification methodology
  • SystemVerilog
  • test planning
  • coverage closure
  • test bench design