Senior Asic Verification Engineer - Networking Chip Design

NVIDIA NVIDIA · Semiconductors · Shanghai, China

Senior ASIC Verification Engineer role focused on leading the delivery of next-generation Switch Silicon chips, involving fullchip activities, integration, and verification with a strategic leadership component.

What you'd actually do

  1. Lead a team of engineers to deliver high-performance Switch Fullchip designs (including top level assembly, integrations, DV, etc.). You will ensure strict alignment with chip schedules and maintain NVIDIA’s rigorous quality standards.
  2. Deep dive into Switch chips’ internals to master the microarchitecture and execution tools/workflows. You will proactively identify workflow bottlenecks and drive continuous improvements to team productivity.
  3. Partner with leadership across different sites to balance resources, synchronize workflows, and share best practices across the organization.
  4. Act as a technical mentor for the local team, fostering a culture of team working, efficiency and innovation.

Skills

Required

  • B.S. or M.S. in Electrical Engineering, Microelectronics, Computer Engineering, or equivalent experience
  • 8+ years of relevant experience in ASIC Design or Verification
  • significant experience in a Leader or Management capacity
  • Fluent English (written and oral)
  • interpersonal skills required to lead, motivate, and eventually manage a high-performing engineering group
  • strong background in Fullchip-level challenges

Nice to have

  • RTL integration
  • top-level verification
  • complex SoC-level verification environment or flow

What the JD emphasized

  • strategic leadership required
  • industry-leading-complex fullchip activities
  • significant experience in a Leader or Management capacity
  • Fluent English (written and oral) is a must
  • strong background in Fullchip-level challenges