Senior Board Design Engineer

Google Google · Big Tech · Tel Aviv, Israel +1

This role focuses on the electrical design of complex High Performance Computing (HPC) systems, specifically driving the development of next-generation AI accelerator boards. The engineer will be responsible for schematic capture, component selection, high-speed interface design, power delivery design, and lab bring-up and debugging of these boards. The role involves cross-functional collaboration with various engineering teams to bring products from concept to mass production.

What you'd actually do

  1. Lead the schematic capture and component selection for high-density, multi-layer Printed Circuit Boards (20+ layers) incorporating high-power ASICs (TPUs/CPUs), FPGAs, and high-speed memory (High Bandwidth Memory/DDR5).
  2. Design and validate high-speed interfaces including Peripheral Component Interconnect Express (PCIe) Gen 6.0/7.0, 400G/800G/1.6T ethernet (PAM4). Collaborate with Signal Integrity (SI) engineers to define routing constraints and stack-up.
  3. Design multi-phase power regulators (VRMs) capable of delivering 1000A currents with fast transient response for AI processors.
  4. Work closely with PCB layout designers to guide placement and routing of critical signals and power planes.
  5. Lead the lab bring-up of first-silicon/first-board. Debug complex hardware issues using oscilloscopes, Time-Domain Reflectometers (TDRs), and logic analyzers. Root-cause failures to component, assembly, or design issues.

Skills

Required

  • board design (schematic and layout supervision)
  • server, networking, or high performance computing products
  • serial interfaces (e.g., SerDes, PCIe, Ethernet, DDR)
  • signal integrity (insertion loss, crosstalk, impedance matching)

Nice to have

  • DC-DC power converter design
  • power integrity concepts
  • bringing up complex SoCs
  • debugging interaction between hardware, firmware, and software
  • Electronic Design Automation (EDA) tools (Cadence Concept/Allegro, or similar)