Senior Cell Modeling and Verification Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

NVIDIA is seeking a Senior Cell Modeling and Verification Engineer to develop behavioral models and verification for custom mixed-signal design cells used in NVIDIA's ASIC products. The role involves using Verilog, SystemVerilog, Perl, or Python, collaborating with cross-functional teams, and ensuring RTL meets design targets.

What you'd actually do

  1. Work with sophisticated technologies and develop behavioral model and verification for custom mixed signal design cells that would be used on all the NVIDIA products.
  2. Use Verilog, SystemVerilog, Perl, or Python and understanding of PLL and other high-speed interconnects to model, verify, emulate/prototype mixed-signal designs.
  3. Collaborate with cross function teams with regards to library build, cell integration, ASIC verification and DFT simulation.
  4. Document, implement, and deliver fully verified and high performance RTL to achieve design targets.

Skills

Required

  • Bachelors or Masters in Electrical Engineering or Computer Engineering (or equivalent experience)
  • 3+ years of relevant experiences
  • Hands-on experience with RTL simulation and waveform debug
  • Strong understanding of Verilog HDL
  • Scripting experiences and skills using Python or Perl
  • Knowledge of fundamental digital design and logic design concepts

Nice to have

  • Previous digital design experience
  • Previous experience running simulations in Verilog
  • Shown ability to collaborate with many groups and communicate technical details