Senior Chip Design Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel +1

Senior Chip Design Engineer role focused on chip-level integration for advanced GPU networking silicon projects. Responsibilities include collaborating with various design teams, developing integration flows, performing RTL synthesis and timing analysis, and ensuring robust design practices. Requires B.Sc. in Electrical or Computer Engineering and 5+ years of experience in chip design, integration, RTL design, or verification, with strong knowledge of Verilog/System Verilog and CDC analysis.

What you'd actually do

  1. Drive chip-level integration for advanced GPU networking silicon projects.
  2. Collaborate with architecture, RTL design, verification, FV and physical design teams to ensure seamless integration and optimal performance.
  3. Develop and maintain integration flows, methodologies, and automation to improve efficiency and quality.
  4. Perform RTL synthesis, timing analysis, and support verification and post-silicon activities.
  5. Handle Clock Domain Crossing (CDC) checks and ensure robust design practices.

Skills

Required

  • B.Sc. in Electrical or Computer Engineering
  • 5+ years of experience in chip design, integration, RTL design and/or verification
  • Strong knowledge of Verilog /System Verilog and RTL design principles.
  • Hands-on experience with CDC analysis, synthesis, and timing closure.
  • Familiarity with EDA tools (Synopsys, Cadence, Mentor) and scripting languages (Python, TCL).
  • Excellent communication skills
  • ability to work in a collaborative, fast-paced environment.

Nice to have

  • Knowledge of network protocols, HPC, or distributed systems

What the JD emphasized

  • 5+ years of experience in chip design, integration, RTL design and/or verification
  • Hands-on experience with CDC analysis, synthesis, and timing closure.