Senior Chip Design Verification Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel

Senior Chip Design Verification Engineer at NVIDIA, focusing on networking silicon for high-speed communication devices. Responsibilities include building reference models, verifying and simulating chip blocks, and collaborating with cross-functional teams. Requires 5+ years of RTL Frontend ASIC Design or Verification experience.

What you'd actually do

  1. Join Tel Aviv group, working in a combined design and verification team which develops Phy Layer IP within the Networking silicon.
  2. Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.
  3. Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

Skills

Required

  • B.Sc in Electrical Engineering or equivalent experience
  • 5+ years of validated experience in RTL Frontend ASIC Design or Verification (Chip Design)
  • Strong debugging, problem-solving and analytical skills
  • A great teammate with strong communication and interpersonal skills

Nice to have

  • Knowledge in Specman
  • Knowledge in Verilog