Senior Circuit Design Engineer

NVIDIA NVIDIA · Semiconductors · US, CA, Santa Clara, US, TX, Austin, US, OR, Remote, US, CA, Remote

Senior Circuit Design Engineer role at NVIDIA, focusing on processor design for next-generation GPUs. Responsibilities include designing silicon monitors, custom macros, and applying circuit techniques to optimize power, performance, and area utilization for communication links. Requires BSEE/MSEE with 7+/6+ years of experience in circuit design, understanding of deep submicron processes, Spice simulation, timing closure, interconnect design, custom circuits, low power circuits, and Place and Route tools. Experience with DFT, scripting languages (Perl, Tcl), and leadership is a plus. The role involves mentoring junior team members.

What you'd actually do

  1. Participate in cutting edge Processor design in deep submicron technologies.
  2. Work as part of a global circuits team to design the state of the art in silicon monitors and many innovative custom macros.
  3. Apply circuit techniques to improve the power, performance and area utilization of the various communication link designs used in next generation GPUs.
  4. Be a mentor/technical lead for junior team members.

Skills

Required

  • BSEE or equivalent experience with 7+ years' experience in circuit design or MS preferred in Electrical, Computer Engineering with 6+ years’ experience with circuit design
  • Good understanding of deep submicron process issues and circuit design
  • Experience in Spice simulation and analysis
  • Understanding of timing closure, interconnect design, and custom circuits
  • Understanding of Place and Route design tools and datapath Tiling techniques
  • Hands on experience in design and analysis of low power circuits, e.g. power gating, decaps, multi-vt

Nice to have

  • Understanding of Design-for-test (DFT) and logic design
  • Proficiency in scripting language, such as, Perl, Tcl, Make and automation methods/algorithms
  • Prior leadership experience

What the JD emphasized

  • circuit design is required
  • Understanding of timing closure, interconnect design, and custom circuits are required
  • Understanding of Place and Route design tools and datapath Tiling techniques is required
  • Hands on experience in design and analysis of low power circuits, e.g. power gating, decaps, multi-vt is required