Senior Circuit Methodology Engineer

NVIDIA NVIDIA · Semiconductors · Santa Clara, CA

Senior Circuit Methodology Engineer at NVIDIA, focusing on evaluating and integrating EDA tools for circuit design, with potential involvement in AI algorithms for workflow improvement. Requires Python/Perl programming, experience with Cadence/Synopsys systems, and transient simulators.

What you'd actually do

  1. We need someone who will work with our EDA vendors on evaluating new tools to benefit circuit design quality and reduce design-cycle times.
  2. To achieve this, you will take ownership of new EDA tool workflows that will involve architecting, implementing, advertising (in-house), and maintenance of these workflows.
  3. This engineer will also work on maintaining our relationships with the EDA vendors and will likely be asked to participate in EDA conferences as a guest and/or speaker.
  4. Part of owning EDA workflows is that we often promote Nvidia ideas to help advise EDA tool development/improvement to be most advantageous to Nvidia.
  5. You would take part in reviewing past problem cases and address issues with procedure or infrastructure improvements.

Skills

Required

  • Python
  • Perl
  • Cadence/Synopsys based system (Virtuoso/Custom Compiler)
  • circuit design methodology

Nice to have

  • Cadence ADE Assembler
  • transient simulator like: alps, hspice, primesim, spectre/spectrex
  • viewing and manipulating layout
  • AI algorithms/flows

What the JD emphasized

  • critical responsibility
  • Mid-level of programming skill is a must
  • 5 plus years of working experience related to circuit design methodology