Senior Clock Architecture & Design Engineer

Intel Intel · Semiconductors · Texas, Austin, United States +1

Senior Clock Architecture & Design Engineer role focused on developing clocking architecture for next-generation CPUs, involving the design of clock distribution networks, custom circuits, and optimization of clock tree synthesis flows. Requires experience in physical design, CTS, static timing analysis, and custom circuits.

What you'd actually do

  1. Architect and implement sophisticated clock distribution networks for high-frequency flagship CPU designs
  2. Pioneer custom clock solutions that push the boundaries of performance and power efficiency
  3. Design breakthrough custom circuits and library cells that enable next-generation processor capabilities
  4. Develop and optimize advanced clock tree synthesis flows for complex, multi-billion transistor designs
  5. Collaborate with world-class architecture, physical design, and validation teams to deliver industry-leading solutions

Skills

Required

  • Bachelor's in Electrical/Computer Engineering or related STEM field and 5+ years of experience. Or a Master's in the same field and 3+ years of experience or a PhD and 1+ years experience.
  • physical design
  • clock tree synthesis (CTS)
  • static timing analysis
  • custom circuits
  • transistor-level design
  • spice simulations
  • programming skills
  • scripting languages

Nice to have

  • high frequency custom clock network design on leading edge technology nodes
  • clocking architecture
  • PLL/DLL architecture and design
  • timing constraint adaptation
  • timing closure methodologies
  • fullchip design tools and flows

What the JD emphasized

  • Experience in physical design, clock tree synthesis (CTS) and static timing analysis
  • Strong background in custom circuits, transistor-level design and spice simulations
  • Strong programming skills and proficiency in industry-standard scripting languages