Senior Design Verification Engineer

Microsoft Microsoft · Big Tech · Mountain View, CA +1 · Silicon Engineering

This role is for a Senior Design Verification Engineer focused on verifying AI accelerators within Microsoft's Cloud Hardware and Infrastructure Engineering team. The engineer will develop verification environments and test suites for pre-silicon functional verification at block, chip, and system levels, as well as reference modeling and post-silicon validation. Responsibilities include collaborating with architects and designers on verification plans, creating and driving test plans, designing technical solutions, developing verification components, debugging failures, and creating automation scripts. The role also involves applying Agile methodologies and collaborating with cross-functional teams.

What you'd actually do

  1. Develop complex verification environments and test suites, including pre-silicon functional verification at the block, chip, and system levels, reference modeling, and post-silicon validation.
  2. Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification.
  3. Create and drive comprehensive test plans and develop tests to ensure full feature coverage.
  4. Design and implement technical solutions to address complex design and quality challenges.
  5. Develop verification components such as scoreboards, sequences, constrained random tests, assertions, and functional coverage models.

Skills

Required

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.

Nice to have

  • 6+ years of experience in creating simulation environments, developing tests, and debugging for multiple silicon IP's or systems.
  • 3+ years’ industry experience of chip and/or computer architecture.
  • 3+ years industry experience in Verilog or VHDL, C/C++, and scripting language such as Python, Ruby or Perl
  • CPU or Graphics core verification experience
  • In depth knowledge of verification principles, testbenches, stimulus generation, System Verilog, UVM, and coverage closure.
  • Experience with hardware design for embedded systems.
  • Firmware development, with secure and non-secure boot flow.
  • Experience with hardware emulation or FPGAs.
  • Design experience or ability to write synthesizable code.
  • Software development experience.
  • Excellent communication skills.

What the JD emphasized

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
  • This role will require access to information that is controlled for export under export control regulations