Senior Design Verification Engineer - GPU Memory Subsystem

NVIDIA NVIDIA · Semiconductors · Durham, NC

Senior Design Verification Engineer for GPU memory subsystem at NVIDIA. Focuses on pre-silicon verification of ASIC memory subsystem IP, including caches, coherency, pipelines, and arbitration. Requires BS degree, 5+ years of ASIC verification experience, and knowledge of computer architecture and Verilog/System Verilog.

What you'd actually do

  1. Actively collaborate with RTL, DV, FV, and Arch teams to then develop and implement design verification strategies for our GPU ASIC memory subsystem IP.
  2. Perform functional and performance verification using advanced tools and methodologies.
  3. Gain a deep understanding of this critical IP's micro-architectural design and implementation while continuing to advance your verification skills.

Skills

Required

  • BS Degree in CompE, EE, CS, or equivalent experience
  • 5+ years of experience covering the full scope of pre-silicon ASIC verification
  • development of verification strategy
  • test plans
  • tests
  • testbench components
  • regression triage
  • debug
  • coverage closure
  • industry standard tools
  • Working knowledge of computer architecture fundamentals
  • Verilog/System Verilog

Nice to have

  • Strong analytical thought process
  • outstanding debug skills
  • Experience with caches
  • coherency
  • complex pipelines
  • arbiters
  • interconnect networks
  • Infrastructure development
  • use of AI to support design and verification development
  • Testbench development experience
  • UVM components used in multiple levels of verification
  • Strong programming/scripting experience in Python or C++
  • Applying suitable algorithms
  • data structures
  • error handling

What the JD emphasized

  • full scope of pre-silicon ASIC verification
  • development of verification strategy
  • test plans
  • tests
  • testbench components
  • regression triage
  • debug
  • coverage closure