Senior Dft Engineer

NVIDIA NVIDIA · Semiconductors · Tel Aviv, Israel +2

Senior DFT Engineer at NVIDIA, focusing on Design-for-Test architecture, verification, and post-silicon validation for semiconductor chips. The role involves developing next-generation DFT technologies and working with chip design, backend, verification, and production testing teams. Responsibilities include managing state-of-the-art DFT/ATPG flows, end-to-end project ownership, and inventing automation for short test times. Requires 5+ years of DFT/ATPG or Physical Design experience, strong scripting skills, and a BSc in Electrical/Computer Engineering.

What you'd actually do

  1. You will be in charge of state of the art Design for Test/ATPG flows and implementation
  2. Take ownership end to end on a project, from Arch & planning to implementation, verification and post Silicon bring up.
  3. Inventing and maintaining automation flows that provide the short test time to production

Skills

Required

  • DFT/ATPG or Physical Design experience
  • DFT ASIC Design
  • ATPG tools
  • scripting languages
  • BSc. in Electrical Engineering or Computer engineering

Nice to have

  • scan
  • BIST
  • on-chip scan compression
  • fault models
  • fault simulation
  • Mentor TestKompress ATPG tool
  • retargeting flow
  • TCL
  • PRL
  • Phyton
  • Unix shell scripts
  • ATE
  • Silicon bring-up

What the JD emphasized

  • 5+ years of hands on DFT/ATPG or Physical Design experience knowledge & technical experience in DFT ASIC Design and in ATPG tools